JEITA ED-7300A
Recommended practice on standard for the preparation of outline drawings of semiconductor packages
Date Published:
2008-01-01
Status:
Valid
Japanese:
Japanese 44pages
JPY 10,800 ( JPY 10,800excl. tax )
- Preview
- Japanese(PDF)
- Standard Abstract
-
This standard specifies the recommended practice for the preparation of outline drawings of semiconductor packages.More
| ICS | |
|---|---|
| Corresponding Standards |
Explanation of Equivalency
|
| Referenced JIS Stantards | |
| Referenced Stantards | |
| Remarks | Stabilized 2013-12-01 Former No. ED-7401A ED-7300 |