JEITA ED-5512
Stub Series Terminated Logic for 3.3Volts (SSTL_3) (A 3.3V Supply Voltage based Interface Standard for Digital ICs)
Date Published:
1996-03-01
Status:
Valid
Japanese:
Japanese 24pages
JPY 6,800 ( JPY 6,800excl. tax )
- Preview
- Japanese(PDF)
- Standard Abstract
-
This standard specifies the stub series terminated logic for 3.3Volts (SSTL_3) (A 3.3V supply voltage based interface standard for digital ICs).More
| ICS | |
|---|---|
| Corresponding Standards |
Explanation of Equivalency
|
| Referenced JIS Stantards | |
| Referenced Stantards | |
| Remarks |