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JEITA EDR-7332
Design guideline of integrated circuits for Dual Tape Carrier packages (TYPE1, TYPE2) (DTP(1), DTP(2))

Date Published: 2002-09-01
Status: Valid
Japanese:

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Standard Abstract
This technical report is about the design guideline of integrated circuits for dual tape carrier packages (TYPE1, TYPE2) (DTP(1), DTP(2)).
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Corresponding Standards
Referenced JIS Stantards
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Remarks This standard is written in both Japanese and English. Former No. ED-7432 ED-7433
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